A team of student researchers from the Nanoelectronics and Computing Research Laboratory (NECRL) at San Francisco State University earned two first-place awards at the AI-HDL University of Arizona 2026 competition, receiving Best Overall Design and First Place in the Upper Division category.
The competition challenged participants to design and implement advanced hardware systems using industry-standard semiconductor design methodologies. The SFSU team successfully designed and implemented an AES-128 encryption engine, taking the project through the complete application-specific integrated circuit (ASIC) design flow using OpenLane, from register-transfer level (RTL) design to physical design and clean GDSII signoff.
The award-winning project showcased the team's technical expertise across multiple stages of chip development. Key engineering achievements included:
- Improving timing performance by approximately 3.7 nanoseconds through strategic pipelining of AES rounds to break critical timing paths.
- Resolving significant slew and fanout challenges with an RTL-level keep_hierarchy solution, eliminating the need for post-route fixes.
- Achieving robust timing closure through aggressive over-constrained synthesis at 9 nanoseconds, resulting in successful signoff at 17.5 nanoseconds.
The project was completed by SFSU students Waylon Woo, Ethan Weldon, and Seyedparsa Mirfasihi as part of their work with NECRL.
The team expressed gratitude to Dr. Soheil Salehi, founder of AI-HDL, and the team at PRISM Lab for organizing the competition and creating a valuable learning experience for aspiring chip designers. They also thanked Dr. Hamid Mahmoodi for his mentorship and guidance throughout the project.
The achievement highlights the strength of hands-on semiconductor design education at San Francisco State University and demonstrates the ability of SFSU students to compete successfully in advanced hardware design challenges at the national level.