School of Engineering

San Francisco State University Receives Charles Babbage Grant from Synopsys

Establishes nanoelectronics and computing research laboratory

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MOUNTAIN VIEW, Calif., Nov. 4, 2010 - Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that San Francisco State University (SF State) is the latest university to receive the Charles Babbage Grant from Synopsys. Through the grant, the School of Engineering received licenses of Synopsys’ comprehensive electronic design automation (EDA) software and intellectual property, along with curriculum support and professor training. The grant also enabled the creation of a new Nanoelectronics and Computing Research Laboratory (NeCRL) by providing a new server and compute hardware for students. Research at the NeCRL will be focused on addressing technology scaling challenges at the circuit and architectural levels of design and on designing reliable, energy efficient and high-performance computing circuits in emerging nanotechnologies.

 

As a result of the Charles Babbage Grant, SF State is developing a curriculum on circuit and system design in nano-scale IC technologies. This curriculum is expected to have a profound impact on the quality of education and to enhance the research capability at the SF State School of Engineering, which is building a vibrant research program in the area of nanoelectronics.

 

“We have had a successful and collaborative relationship with Synopsys since fall 2008, resulting in the development of new instructional resources and research publications,” said Hamid Mahmoodi, assistant professor, School of Engineering at SF State. “The Synopsys Charles Babbage grant is a great way to take our collaboration to the next level.”

 

Synopsys software and silicon intellectual property (IP) provides students and researchers the opportunity to utilize industrial tools for logic and physical synthesis, circuit simulation, nanometer device modeling and fabrication process modeling. Synopsys software and IP serves as the foundation for an industry design flow where students get real-world, hands-on experience building and testing their designs.

 

“Synopsys selected SF State to receive a Charles Babbage grant because of their commitment to implementing a comprehensive IC design curriculum as well as their leadership and collaboration efforts with other Synopsys Worldwide University Program members,” said Rich Goldman, vice president, corporate marketing and strategic alliances at Synopsys. “Through this grant, we look forward to helping SF State fulfill their mission of educating students to positively contribute to the engineering profession.”

 

Access to industrial design tools for advanced research and microelectronic design is a common challenge facing universities today. Synopsys helps resolve this issue through initiatives like the Charles Babbage Grant and its Worldwide University Program, which provide select universities with design software and IP for modern electronic design flows and leading IC fabrication processes. Previous grant recipients include Case Western Reserve University, Chinese Academy of Sciences, Indian Institute of Technology at Kharagpur, Moscow Institute of Technology, North Carolina State University, Purdue University, San Jose State University, Silicon Valley Technical Institute, Southern Methodist University, State Engineering University of Armenia, Syracuse University, University of Southampton and Yerevan State University.

 

About the Charles Babbage Grant

The Charles Babbage Grant provides select universities worldwide with state-of-the-art EDA tools, silicon intellectual property, training, support and technology. It enables institutions of higher education to enhance their expertise in microelectronics circuits and system design. Use of the Synopsys tools on modern, powerful computers from the grant helps universities to better prepare their graduates for the future by providing hands-on experience with current industry practices, modern design techniques, and actual design tools and hardware. This enhances their understanding of how learning applies to the real world of IC design. The grant is named after British mathematician and inventor Charles Babbage, who designed and built mechanical computing machines on principles that anticipated the modern electronic computers of today more than 150 years ago.

 

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/  (Opens in New Window).

 

Synopsys is a registered trademark of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

 

Editorial Contacts:

Sheryl Gulizia   

Synopsys, Inc.

650-584-8635

sgulizia@synopsys.com

 

Lisa Gillette-Martin

MCA, Inc.

650-968-8900 ext. 115

lgmartin@mcapr.com


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